The present invention relates to an improved clock-synchronism evaluating apparatus and method for evaluating synchronism between two clock signals (two clock pulse trains), i.e. determining whether or not frequencies of the two clock signals appropriately coincide with each other.
In music studios and the like, musical data are often transmitted and received between a plurality of interconnected audio devices, such as a mixer and a recorder. In such cases, it has been conventional to interconnect audio devices having operating clocks of a same frequency (e.g., 48 kHz). According to this scheme, transmission and reception rates of musical data are equal to each other, so that the data transmission and reception can be carried out in a synchronized fashion.
With the conventional method, however, operating clock pulses are generated in the interconnected audio devices independently of each other. Thus, a slight deviation or difference tends to occur between the operating clock frequencies of the individual audio devices so that the operating clock frequencies of the audio devices may undesirably get out of synchronism with each other.
Under such conditions, the musical data often can not be transmitted/received appropriately because there would occur a data dropout and noise production. Therefore, there is a need to keep monitoring as to whether or not there has occurred a frequency difference between the operating clock frequencies of the individual audio devices in order to promptly detect any frequency difference. This is because if only it can be recognized that the operating clock signals of the audio devices have got out of synchronism with each other, prompt measures, such as muting of the output signal or system-resetting of the individual audio devices, can be taken.
FIG. 12 is a diagram explanatory of a method that is being widely used today for detecting an asynchronous state between operating clocks. In this figure, a data receiving device 92 includes a buffer 93 for temporarily storing received data, and the buffer 93 has a capacity corresponding to a specific quantity of data to be transmitted or received per operating clock pulse.
In FIG. 12, data are transmitted from a data transmitting device 91 to the data receiving device 92 via interfaces 94 and 95, in synchronism with an operating clock pulse CLK91 of the data transmitting device 91. The musical data received by the data receiving device 92 are stored into the buffer 93. Then, the musical data are read out from the buffer 93 in synchronism with an operating clock pulse CLK92 of the data receiving device 92.
FIG. 13 is a time chart explanatory of operation of the buffer 93 in the data receiving device 92. In this case, data are stored into the buffer 93 in synchronism with a rising edge of the operating clock pulse CLK91 of the data transmitting device 91, and the stored data are read out from the buffer 93 in synchronism with a rising edge of the operating clock pulse CLK92 of the data receiving device 92.
The time chart of FIG. 13 concerns a case where the frequency of the operating clock pulses CLK91 of the data transmitting device 91 is slightly lower than the frequency of the operating clock pulses CLK92 of the data receiving device 92. As shown, periods (T91, T92, . . . ), each representing a time length from the time point when the data are stored into the buffer 93 to the time point when the thus-stored data are read out from the buffer 93, progressively become shorter, and thus at time point TM96, there would come the timing to perform a data read operation even though no stored data is present in the buffer 93 (empty state). In such an “empty” state, no appropriate data transmission/reception can be carried out.
Note that if, on the other hand, the frequency of the operating clock pulses CLK91 of the data transmitting device 91 is slightly higher than the frequency of the operating clock pulses CLK92 of the data receiving device 92, there would come the timing to store data into the buffer 93 even though the stored data have not yet been read out from the buffer 93 (flooded state). In such a “flooded” state too, no appropriate data transmission/reception can be carried out.
When the above-mentioned empty state or buffer flooded state of the buffer 93 is detected, it has been conventional to judge that the operating clocks have got out of synchronism with each other. Thus, it has been conventional to judge that no frequency difference has occurred between the operating clocks, as long as such a buffer empty state or buffer flooded state is detected.
With The above-discussed conventional method, it is possible to calculate a time length Tb from the time point when the operating clocks get out of synchronism with each other to the time point when the buffer is brought to the empty or flooded state, using the following equation.1/Tb=FA1−FA2where “Tb” represents time (sec.) that elapses before the buffer is brought to the empty or flooded state, “FA1” represents the operating clock frequency (Hz) of one of the audio devices and “FA2” represents the operating clock frequency (Hz) of the other audio device.
Assuming that the operating clock frequency of the one audio device is 48 (48,000) kHz and the operating clock frequency of the other audio device is 48,001 Hz, the above equation calculates the time Tb as one second. In general, the smaller the frequency difference, the longer time the frequency difference detection takes, so that the conventional method can not promptly detect the frequency difference if the frequency difference is very small.
Further, in recent years, the IEEE1394 and USB (Universal Serial Bus) are often used as digital audio interfaces. These interfaces permit packet transmission/reception of about forty times as many musical data as with the conventional counterparts per operating clock pulse.
Therefore, in the case where the IEEE1394 or USB is used as an interface, the musical data receiving device must be provided with a buffer having a storage capacity about forty times greater than the conventional counterpart. Such a buffer with the increased storage takes a longer time, forty times longer than the conventional buffer, to assume the empty or flooded state, which would thus prevent a frequency difference from being detected promptly.
In general, it may be readily realized that a frequency coincidence between two clock signals can be appropriately tested by merely measuring the respective periods of the clock signals with high-speed clock pulses. However, if the periods of two clock signals having a very slight frequency difference, such as those of 48,000 Hz and 48,100 Hz, are measured in this manner, the respective periods would be detected as having no substantial difference due to a limit to the frequency or resolution of the measuring high-speed clock pulses. As a consequence, the exact frequency difference between the two clock signals could not be detected accurately.